In the present description, by “electronic circuit” is meant in general a single integrated circuit or systems of integrated electronic circuits, to be obtained via technologies of machining of integrated circuits on chips that define a substrate for fabrication of the circuit.
Various embodiments may find application in computer apparatuses such as workstations, server computers, and the like.
Known to the art are tools for design of substrates that operate in the environment for design of electronic systems and circuits, i.e., electronic-design-automation (EDA) environments. In particular, among EDA environments there is known, for example, the design suite Cadence, which comprises, in a version thereof, a platform called Virtuoso Platform for designing full-custom integrated circuits, which comprises entry of the schematics, behavioral modeling (Verilog-AMS), circuit simulation, full-custom layouts, steps of verification at a physical level, extraction of netlists.
The tools for assisted electronic design available hence provide a very limited support when it is a question of evaluating the interactions between electronic devices of the aforesaid electronic systems and circuits in a chip at the level of the substrate of the chip.
In this context of paucity of tools that operate at the substrate level, even fewer are the tools that enable evaluations to be made on the thermal behavior of the circuit at this level.
There is known, for example, available also for integration with design programs, such as the aforementioned Cadence, a software tool developed by Gradient called HeatWave, which employs a thermal model that uses the layout data (for example, generated by Cadence Virtuoso) of the integrated circuit and a thermal technical file that contains the thicknesses of the layers and the properties of materials, including their temperature dependence.
However, even though this tool manages to carry out complex thermal simulations, also taking into account effects of the package, it does not supply effective information on the behavior at the substrate level and is not able to make electro-thermal simulations, in the simulation environment itself, that are at the same time precise and fast.
In the context outlined above, there is felt the need to evaluate the thermal interactions between electronic devices of the aforesaid electronic systems and circuits in a chip at the level of the substrate of the chip itself, overcoming the drawbacks outlined previously.